- PII
- S30345901S0033849425050099-1
- DOI
- 10.7868/S3034590125050099
- Publication type
- Article
- Status
- Published
- Authors
- Volume/ Edition
- Volume 70 / Issue number 5
- Pages
- 506-515
- Abstract
- The paper discusses hardware implementation algorithms for widely used half-band filters (HBF), such as the Coefficient Quantization Algorithm (CQA), the Multiple Constant Multiplication (MCM) algorithm, and their combination, CQA+MCM. The use of the CQA algorithm reduces the number of multipliers in the HBF filter structure. The MCM algorithm converts multipliers into a set of adders and bit shifts. Combining both algorithms allows for replacing all multipliers with a set of adders and bit shifts. A resource analysis was carried out for hardware implementations of 30th- and 94th-order HBF filters. It was found that the CQA algorithm reduces the number of multipliers by 37 % and 74 %, respectively. The MCM algorithm completely eliminates multipliers from the filter design, but the number of adders increases by 3x and 2.6x, respectively. A comparison with existing methods showed that the time required to compute the coefficients of the optimized filter using the proposed algorithms is only a few seconds, whereas most other methods take significantly longer (up to a full day). It was shown that the difference in the required resources does not exceed 10 %.
- Keywords
- фильтры с конечной импульсной характеристикой цифровые передискретизаторы аппаратная оптимизация
- Date of publication
- 08.12.2025
- Year of publication
- 2025
- Number of purchasers
- 0
- Views
- 16
References
- 1. Omeneetku A., Шафер P. Цифровая обработка сигналов. М.: Техносфера, 2012.
- 2. Rabiner L., Schafer R. // IEEE Trans. 1971. V. AE-19. № 3. Р. 200. https://doi.org/10.1109/TAU.1971.1162185
- 3. San-Jose-Revuelta L.M., Arribas J.I. // Expert Systems with Applications. 2018. V. 106. Р. 92.
- 4. Selesnick I. Linear-Phase FIR Filter Design by Least Squares /EL 713. Lecture Notes. N.Y.: New York Univ., 2005. 39 p. https://eeweb.engineering.nyu.edu/ iselesni/EL713/firis/firis.pdf
- 5. Aggarwal A., Rawat T.K., Kumar M., Upadhyay D.K. Design of optimal band-stop FIR filter using L1 norm based RCGA // Ain Shams Engineering J. 2018. V. 9. № 2. Р. 277.
- 6. McClellan J., Parks T., Rabiner L. // IEEE Trans. 1973. V.AE-21. № 6. Р. 506.
- 7. Aksoy L., Flores P., Monteiro J. // IEEE Trans. 2014. V. SP-63. № 1. Р. 142.
- 8. Kumm M., Volkova A., Filip S.-I. // IEEE Trans. 2023. V. CAD-42. № 2. Р. 658. https://doi.org/10.1109/TCAD.2022.3179221
- 9. Xu F., Chang C.H., Jong C.C. // IEEE Trans. 2007. V. CAD-26. № 10. Р. 1898.
- 10. Shi D., Yu Y.J. // IEEE Trans. 2011. V. CS-58. № 1. Р. 126.
- 11. Gustafsson O., Wanhammer L. // Proc. 2002 45 th Midwest Symp. Circuits and Systems (MSCAS). Tusla. 04–07 Aug. N.Y.: IEEE, 2002. V. 3. Р. 9.
- 12. Yu Y.J., Lim Y.C. // Circuits, Systems, Signal Processing. 2010. V. 29. № 1. Р. 65.
- 13. Yli-Kaakinen J., Saramaki T. // Proc. 2001 IEEE Int. Symp. Circuits and Systems (ISCAS). Sydney. 09 May. N.Y.: IEEE, 2001. Р. 185.
- 14. Shaheim A., Zhang Q., Lotze N., Manoli Y. // IEEE Trans. 2012. V. CS(I) – 59. № 3. Р. 616.
- 15. Aktan M., Yurdakul A., Diudar G. // IEEE Trans. 2008. V. CS-55. № 6. Р. 1536.
- 16. Chen C.-L., Willson A.N., Jr. // IEEE Trans. 1999. V. СБ(Щ)-46. № 1. Р. 29.
- 17. Aksoy L., Güneş E.O., Flores P. // Microprocessors and Microsystems. 2010. V. 34. № 5. Р. 151.
- 18. Degtyarev A., Saifullin K., Bakhurin S. // 2022 24th Int. Conf. on Digital Signal Processing and its Applications (DSPA). Moscow, 30 Mar. – 01 Apr. N.Y.: IEEE, 2022. Paper No. 9790772.
- 19. Bakholdin N., Degtyarev A., Bakhurin S. // 2023 5th Int. Youth Conf. on Radio Electronics, Electrical and Power Engineering (REEPE). Moscow. 16–18 Mar. N.Y.: IEEE, 2023. Paper No. 10086717.
- 20. Солошина А.И. Цифровая обработка сигналов. Моделирование в Simulink. СПб.: БХВ-Петербург, 2012.
- 21. Thong J., Nicolici N. // IEEE Trans. 2011. V. CAD-30. № . 9. P. 1373.
- 22. Boudjelaba K., Ros F., Chikouche D. // IET Signal Processing. 2014. V. 8. P. 429.
- 23. Aksoy L., Flores P., Monteiro J. // 2014 IEEE Int. Symp. on Circuits and Systems (ISCAS). Melbourne, 01–05 Jun. N.Y.: IEEE, 2014. P. 1456.
